Getting Started¶
OpenROAD is divided into a number of tools that are orchestrated together to achieve RTL-to-GDS. As of the current implementation, the flow is divided into two stages:
- Logic Synthesis: is performed by yosys.
- Floorplanning through Detailed Routing: are performed by OpenROAD App.
In order to integrate the flow steps, OpenROAD-flow-scripts repository includes the necessary scripts to build and test the flow.
Prerequisites¶
Before proceeding to the next step: 1. Install Docker on your machine, OR 2. Check that build dependencies for all tools are installed on your machine.
During initial Setup or if you have installed on a new machine, run this script: run ./etc/DependencyInstaller.sh
Get the tools¶
There are currently two options to get OpenROAD tools.
Option 1: build from sources using Docker¶
Clone and Build¶
$ git clone --recursive https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts
$ cd OpenROAD-flow-scripts
$ ./build_openroad.sh
Verify Installation¶
The binaries should be available on your $PATH
after setting up the
environment.
$ docker run -it -u $(id -u ${USER}):$(id -g ${USER}) -v $(pwd)/flow/platforms:/OpenROAD-flow-scripts/flow/platforms:ro openroad/flow-scripts
[inside docker] $ source ./setup_env.sh
[inside docker] $ yosys -help
[inside docker] $ openroad -help
[inside docker] $ cd flow
[inside docker] $ make
[inside docker] $ exit
Option 2: Build from sources locally¶
Clone and Build¶
$ git clone --recursive https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts
$ cd OpenROAD-flow-scripts
$ ./build_openroad.sh --local
Verify Installation¶
The binaries should be available on your $PATH
after setting up the
environment.
$ source ./setup_env.sh
$ yosys -help
$ openroad -help
$ exit
Designs¶
Sample design configurations are available in the designs
directory.
You can select a design using either of the following methods:
1. The flow Makefile contains a list of sample design configurations at
the top of the file. Uncomment the respective line to select the design
2. Specify the design using the shell environment, e.g.
make DESIGN_CONFIG=./designs/nangate45/swerv/config.mk
or
export DESIGN_CONFIG=./designs/nangate45/swerv/config.mk ; make
By default, the simple design gcd is selected. We recommend implementing this design first to validate your flow and tool setup.
Adding a New Design¶
To add a new design, we recommend looking at the included designs for examples of how to set one up.
Platforms¶
OpenROAD-flow-scripts supports Verilog to GDS for the following open platforms: Nangate45 / FreePDK45
These platforms have a permissive license which allows us to
redistribute the PDK and OpenROAD platform-specific files. The platform
files and license(s) are located in platforms/{platform}
.
OpenROAD-flow-scripts also supports the following commercial platforms: TSMC65LP / GF14 (in progress)
The PDKs and platform-specific files for these kits cannot be provided due to NDA restrictions. However, if you are able to access these platforms, you can create the necessary platform-specific files yourself.
Once the platform is setup. Create a new design configuration with
information about the design. See sample configurations in the
design
directory.
Implement the Design¶
Run make
to perform Verilog to GDS. The final output will be located
at flow/results/{platform}/{design_name}/6_final.gds
Miscellaneous¶
tiny-tests - easy to add, single concern, single Verilog file¶
The tiny-tests are have been designed with two design goals in mind:
- It should be trivial to add a new test: simply add a tiny standalone
Verilog file to
OpenROAD-flow-scripts/flow/designs/src/tiny-tests
- Each test should be as small and as standalone as possible and be a single concern test.
To run a test:
make DESIGN_NAME=SmallPinCount DESIGN_CONFIG=`pwd`/designs/tiny-tests.mk
nangate45 smoke-test harness for top level Verilog designs¶
- Drop your Verilog files into designs/src/harness
- Start the workflow:
make DESIGN_NAME=TopLevelName DESIGN_CONFIG=`pwd`/designs/harness.mk
Note
TIP! Start with a small tiny submodule in your design with few pins